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document no. u14832ee2v1ds00 data published: january 2002 v850e/vanstorm tm 32-/16-bit single-chip microcontroller with can and van interfaces the information contained in this document is released in advance of the production cycle for the device. the parameters for the device may change before final production, or nec corporation may, at its own discretion, withdraw the device prior to production. ? nec corporation 2002 data sheet mos integrated circuit pd76f0018 description the v850e/vanstorm single chip microcontroller, is a member of nec's v850 32-bit risc family, which match the performance gains attainable with risc-based controllers to the needs of embedded control applications. the v850 cpu offers easy pipeline handling and programming, resulting in compact code size comparable to 16-bit cisc cpus. the v850e/vanstorm offers an excellent combination of general purpose peripheral functions, like serial commu- nication interfaces (uart, clocked si), timers and measurement inputs (a/d converter), with dedicated can and van network support. to support more than one network, two van interfaces and one can interface are imple- mented on chip. the device offers power-saving modes to manage the power consumption effectively under vary- ing conditions. thus equipped, the v850e/vanstorm is ideally suited for automotive applications. functions in detail are described in the following user?s manuals. be sure to read these manuals when you design your systems. v850e/vanstorm user?s manual - hardware : u14879ee1v0um00 v850e family tm user?s manual - architecture : u14559ej1 features ? 32-bit risc cpu with harvard architecture full-van interface: 2 channels full-can interface: 1 channel serial interfaces: 4 channels - 3-wire mode: 2 channels - uart mode: 2 channels timers: 7 channels - 16/32-bit multi purpose timer/event counter: 3 channels - 16-bit os timer: 2 channel - watch timer: 1 channel - watchdog timer: 1 channel 10-bit resolution a/d converter: 12 channels i/o lines: 89 external bus interface (16-bit data / 24-bit address bus) power supply voltage range: 4.5 v v dd5 5.5 v frequency range: up to 20 mhz crystal frequency range: 4 mhz f crystal 5 mhz built-in voltage monitor with low voltage detection (selectable threshold and hysteresis) built-in low power saving mode built-in clock oscillator circuit with internal pll vectored interrupts: 49 temperature range: -40 c to +85 c package: 144 qfp, 0.5 mm pin-pitch (20 x 20 mm) ordering information device part number package rom ram oper. freq. v850e/vanstorm pd76f0018 qfp144 20 x 20 mm 256 k flash 8 k 20 mhz
2 data sheet u14832ee2v1ds00 pd76f0018 internal block diagram flash/ rom ram pc barrel shifter system registers general registers hardware multiplier a l u internal peripheral bus b cpu core 10-bit a/d 12 channels watch / watchdog timer av ref analog inputs supply x1 x2 mode reset clkout oscillator an clock generator with pll system control ports rpu 16-/32-bit 16-bit full- can 1 full- van 0 uart0 uart1 brg ctxd1 crxd1 rx0van0 txd0 rxd0 txd1 rxd1 so0 si0 sck0 csi0 power supply voltage monitor with low voltage detection voltage threshold brg brg0 full- van 1 so1 si1 sck1 csi1 brg1 av ss av dd int0 int1 int2 intc intpe00-intpe52 tie0-tie2 tclre0-tclre2 rx1van0 rx2van0 txvan0 rx0van1 rx1van1 rx2van1 txvan1 memc timer toe10-toe42 a0 - a23 d0 - d15 lwr, uwr, rd wait cs2 - cs4
3 data sheet u14832ee2v1ds00 pd76f0018 pin identification a0 - a23 address bus rx0van0 - rx0van1 van receive data inputs ani0 - ani11 analogue inputs rx1van0 - rx1van1 van receive data inputs av dd power supply +5 v rx2van0 - rx2van1 van receive data inputs av ref analogue reference voltage rxd0 - rxd1 receive data inputs av ss power supply ground reset system reset input cclk external can clock input rd read data control signal clockin external system clock input sck0 - sck1 serial clock clksel clock selection configuration input si0 - si1 serial input clkout clock output so0 - so1 serial output cv dd voltage regulator capacitor connection tclre0 - tclre2 external function control inputs cv ss voltage regulator capacitor connection tie0 - tie2 external count clock inputs crxd1 can receive data inputs toe10 - toe42 function outputs (pwm) ctxd1 can transmit data outputs txd0 - txd1 transmit data outputs cs2 - cs4 chip select outputs for accessing exter- nal devices txvan0 - txvan1 van transmit data outputs d0 - d15 data bus vcmpout hysteresis feedback output ic always connect to v ss5x vcmpin voltage surveillance sense input int0 - int2 external interrupt inputs v dd30 - v dd32 voltage regulator capacitor connec- tion intpe00- intpe52 shared external interrupt inputs v dd50 - v dd54 power supply +5 v mode0 - mode2 global operation mode selection inputs v pp0 - v pp1 programming voltage inputs nmi non maskable interrupt input v ss50 - v ss55 power supply ground p1x - p6x multi-purpose i/o ports, shared with other functions v ss30 - v ss32 voltage regulator capacitor connec- tion and ground pa l x , pa h x multi-purpose i/o ports, shared with other functions wait waitstate input for external devices pcmx multi-purpose i/o ports, shared with other functions lwr - uwr write data control signal pcsx multi-purpose i/o ports, shared with other functions x1 oscillator quartz connection pctx multi-purpose i/o ports, shared with other functions x2 oscillator quartz connection pdlx multi-purpose i/o ports, shared with other functions
4 data sheet u14832ee2v1ds00 pd76f0018 pin configuration 144-pin plastic qfp (top view) p30/tie0/intpe00 p31/toe10/intpe10 p32/toe20/intpe20 p33/toe30/intpe30 p34//toe40/intpe40 p35/tclre0/intpe50 p40/tie1/intpe01 p41/toe11/intpe11 p42/toe21/intpe21 p43/toe31/intpe31 p44/toe41/intpe41 p50/tie2/intpe02 p51/toe12/intpe12 p52//toe22/intpe22 p53/toe32/intpe32 p54/toe42/intpe42 p55/tclre2/intpe52 v dd 50 v ss 50 pal0/a0 pal1/a1 pal2/a2 pal3/a3 pal4/a4 pal5/a5 pal6/a6 pal7/a7 pal8/a8 pal9/a9 pal14/a14 pal15/a15 pah0/a16 pah1/a17 pah2/a18 pah3/a19 pah4/a20 pah5/a21 pah6/a22 pah7/a23 v dd 51 v ss 51 rx1van1 rx2van1 rx0van1 txvan1 p14 p15 p16 pcs2/cs2 rx1van0 p13 p12 p11/ctxd1 p10/crxd1 p25/sck1 p24/so1 p23/si1 v ss 54 v dd 54 v pp 1 p22/sck0 p21/so0 p20/si0 pdl15/d15 pdl14/d14 pdl13/d13 pdl12/d12 pdl11/d11 pdl10/d10 pdl9/d9 pdl8/d8 v ss 53 v dd 53 v pp 0 pdl7/d7 pdl6/d6 pdl5/d5 pdl4/d4 pdl3/d3 v ss55 av dd av ss av ref ani0 ani1 ani2 ani3 ani4 ani5 ani6 ani7 ani8 ani9 ani10 ani11 mode2 v dd 32 v ss 32 x2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 pcs3/cs3 pcs4/cs4 pct0/lwr pct1/uwr pct2 pct3 pct4/rd pcm0/wait pcm1/clkout p60/cclk 124 123 122 121 120 119 118 117 116 115 57 58 59 60 61 62 63 64 65 66 x1 cv ss cv dd mode1 mode0 ic clksel reset vcmpin v850e "vanstorm" 31 32 33 34 35 36 pal10/a10 pal11/a11 pal12/a12 pal13/a13 v dd 30 v ss 30 67 68 69 70 71 72 p61/int0 v ss 52 v dd 52 p62/int1 p63/int2 p64/rxd1 pdl2/d2 pdl1/d1 pdl0/d0 v ss 31 v dd 31 p65/txd1 78 77 76 75 74 73 vcmpout/nmi p27/txd0 p26/rxd0 txvan0 rx0van0 rx2van0 114 113 112 111 110 109 p45/tclre1/intpe51 clockin
5 data sheet u14832ee2v1ds00 pd76f0018 table of contents internal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 pin identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1. pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.2 other pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2. programming flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3. electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 general characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3.1 oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3.2 pll characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3.3 i/o capacitances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 oscillator recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.5 dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.6 ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.6.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.6.2 clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 3.6.3 external memory access read timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.6.4 external memory access write timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.6.5 reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 3.6.6 interrupt timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.7 peripheral function characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.7.1 timer e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.7.2 csi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.7.3 uart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.7.4 fvan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.7.5 fcan . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.7.6 a/d converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.7.7 voltage comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.8 flash eprom characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4. package drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5. recommended soldering conditions. . . . . . . . . . . . . . . . . . . . . . . . 35 6. revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6 data sheet u14832ee2v1ds00 pd76f0018 list of figures figure 1-1: i/o circuit......................................................................................................... ............ 13 figure 3-1: crystal or resonator connection in osc mode........................................................... 18 figure 3-2: external clock in direct mode ..................................................................................... 18 figure 3-3: ac test input/output waveform, ac test load condition ......................................... 21 figure 3-4: clock ac characteristics............................................................................................ .21 figure 3-5: external memory access read timing ....................................................................... 23 figure 3-6: external memory access write timing........................................................................ 25 figure 3-7: reset timing ........................................................................................................ ....... 26 figure 3-8: interrupt timing .................................................................................................... ....... 27 figure 3-9: timer e characteristics ............................................................................................. .. 28 figure 3-10: csi slave mode characteristics.................................................................................. 29 figure 3-11: flash eprom programming timing ........................................................................... 33 figure 4-1: package drawing ..................................................................................................... ... 34
7 data sheet u14832ee2v1ds00 pd76f0018 list of tables table 1-1: pin functions: ports ................................................................................................. ........ 8 table 1-2: pin functions: functions ............................................................................................. ... 11 table 3-1: absolute maximum ratings............................................................................................ 1 5 table 3-2: operating conditions................................................................................................. ..... 16 table 3-3: oscillator characteristics........................................................................................... ..... 17 table 3-4: pll characteristics .................................................................................................. ...... 17 table 3-5: i/o capacitances ..................................................................................................... ....... 17 table 3-6: dc characteristics................................................................................................... ....... 19 table 3-7: power supply currents................................................................................................ ... 20 table 3-8: clock ac characteristics............................................................................................. ... 21 table 3-9: external memory access read timing .......................................................................... 22 table 3-10: external memory access write timing........................................................................... 24 table 3-11: reset timing ........................................................................................................ .......... 26 table 3-12: interrupt timing ................................................................................................ .......... 27 table 3-13: timer e characteristics ............................................................................................. ..... 28 table 3-14: csi master mode characteristics................................................................................... 29 table 3-15: csi slave mode characteristics..................................................................................... 2 9 table 3-16: uart characteristics ................................................................................................ ..... 30 table 3-17: fvan characteristics ................................................................................................ ..... 30 table 3-18: fcan characteristics ................................................................................................ ..... 30 table 3-19: a/d converter characteristics ....................................................................................... .31 table 3-20: voltage comparator characteristics............................................................................... 31 table 3-21: flash eprom programming characteristics basic specification .................................. 32 table 3-22: flash eprom serial programming operation characteristics ...................................... 33 table 5-1: soldering conditions ................................................................................................. ..... 35
8 data sheet u14832ee2v1ds00 pd76f0018 1. pin functions 1.1 port pins table 1-1: pin functions: ports port i/o function driver type alternate1 alternate2 alternate2 p10 i/o port 1 7-bit input/output port 5-k crxd0 p11 ctxd0 p12 p13 p14 p15 p16 p20 i/o port 2 8-bit input/output port 5si0 p21 5-k so0 p22 5 sck0 p23 5-k si1 p24 so1 p25 sck1 p26 rxd0 p27 txd0 p30 i/o port 3 6-bit input/output port 5-k tie00 intpe00 p31 tie10 toe10 intpe10 p32 tie20 toe20 intpe20 p33 tie30 toe30 intpe30 p34 tie40 toe40 intpe40 p35 tie50 tclre0 intpe50 p40 i/o port 4 6-bit input/output port 5-k tie01 intpe01 p41 tie11 toe11 intpe11 p42 tie21 toe21 intpe21 p43 tie31 toe31 intpe31 p44 tie41 toe41 intpe41 p45 tie51 tclre1 intpe51 p50 i/o port 5 6-bit input/output port 5-k tie0 intpe02 p51 tie12 toe12 intpe12 p52 tie22 toe22 intpe22 p53 tie32 toe32 intpe32 p54 tie42 toe42 intpe42 p55 tie52 tclre2 intpe52 p60 i/o port 6 6-bit input/output port 5-k cclk p61 int0 p62 int1 p63 int2 p64 rxd1 p65 txd1
9 data sheet u14832ee2v1ds00 pd76f0018 pa l 0 i/o port al 16-bit input/output port 5-k a0 pa l 1 a 1 pa l 2 a 2 pa l 3 a 3 pa l 4 a 4 pa l 5 a 5 pa l 6 a 6 pa l 7 a 7 pa l 8 a 8 pa l 9 a 9 pal10 a10 pal11 a11 pal12 a12 pal13 a13 pal14 a14 pal15 a15 pa h 0 i/o port ah 8-bit input/output port 5 a16 pa h 1 a 1 7 pa h 2 a 1 8 pa h 3 a 1 9 pa h 4 a 2 0 pa h 5 a 2 1 pa h 6 a 2 2 pa h 7 a 2 3 pdl0 i/o port dl 16-bit input/output port 5-k d0 pdl1 d1 pdl2 d2 pdl3 d3 pdl4 d4 pdl5 d5 pdl6 d6 pdl7 d7 pdl8 d8 pdl9 d9 pdl10 d10 pdl11 d11 pdl12 d12 pdl13 d13 pdl14 d14 pdl15 d15 pcm0 i/o port cm 2-bit input/output port 5-k wait pcm1 clkout table 1-1: pin functions: ports port i/o function driver type alternate1 alternate2 alternate2
10 data sheet u14832ee2v1ds00 pd76f0018 pcs2 i/o port cs 3-bit input/output port 5-k cs2 pcs3 cs3 pcs4 cs4 pct0 i/o port ct 5-bit input/output port 5-k wr0 pct1 wr1 pct2 pct3 pct4 rd table 1-1: pin functions: ports port i/o function driver type alternate1 alternate2 alternate2
11 data sheet u14832ee2v1ds00 pd76f0018 1.2 other pins table 1-2: pin functions: functions pin name i/o function termination driver ty p e v dd50 - v dd54 - power supply 5 v - v ss50 - v ss55 v dd30 - v dd32 - connection for external capacities note - v ss30 - v ss32 connection for external capacities, connect to v ss5x cv dd - connection for external capacities to stabilize clock oscillator power supply - cv ss connection for external capacities to stabilize clock oscillator power supply, connect to v ss5x x1 input system clock oscillator connection pins. see chapter 3.4 on page 18 - x2 - - clockin input external system clock input 10 k to v ss5x 2 v pp0 , v pp1 - flash memory programming voltage 10 k to v ss5x - mode1 input selects operating mode (internal rom / rom less) v dd5 or v ss5x 2 mode0, mode2 input have to be fixed to v ss v ss5x 2 reset input system reset input 2 clkout output internal cpu system clock output - 5-k clksel input clock generator operation mode 10 k v dd5x or v ss5x 2 av dd - power supply for a/d converter v dd5x - av ss v ss5x - av ref input reference voltage input for a/d converter av dd - nmi input non maskable interrupt input 100 k to v dd5x 5-k vcmpout output voltage comparator feedback output - 1 vcmpin input voltage comparator compare input 100 k to v dd5x ani0 - ani11 input analog input to a/d converter v ss5x 7 ic input internal connection (connect to v ss5x )v ss5x - si0 input serial receive data input to csi0-csi1 100 k to v dd5x 5 si1 100 k to v dd5x 5-k so0 output serial transmit data output from csi0-csi1 100 k to v dd5x 5-k so1 100 k to v dd5x 5-k sck0 i/o serial clock i/o from csi0 100 k to v dd5x 5 sck1 i/o serial clock i/o from csi1 100 k to v dd5x 5-k rxd0 input serial receive data input to uart0-uart2 100 k to v dd5x 5-k rxd1 100 k to v dd5x 5-k txd0 output serial transmit data output from uart0- uart2 100 k to v dd5x 5-k txd1 100 k to v dd5x 5-k crxd1 input serial receive data input to fcan0 100 k to v dd5x 5-k
12 data sheet u14832ee2v1ds00 pd76f0018 note: all v dd3x power supply pins must be tied together externally. resistance between v dd3x pins must not exceed 0.1 ? ? table 1-2: pin functions: functions pin name i/o function termination driver ty p e
13 data sheet u14832ee2v1ds00 pd76f0018 figure 1-1: i/o circuit type 1 type 2 type 5 type 5-k type 7 v dd p-ch n-ch in in data output disable input enable v dd p-ch in/out n -ch data output disable input enable v dd p-ch in/out n -ch type 19 n-ch out p-ch n -ch v ref + & in data
14 data sheet u14832ee2v1ds00 pd76f0018 2. programming flash memory the device pd76f0018 supports the programming of the internal flash in two ways: either by using the flash master programming tool or by performing self-programming using software functions and i/o communications. for programming details about both methods, see the user ? s manual. for timing characteristics about the initial programming using flash master and some more electrical data about the flash memory, see chapter: ? flash eprom characteristics ? on page 32.
15 data sheet u14832ee2v1ds00 pd76f0018 3. electrical specifications 3.1 absolute maximum ratings notes: 1. group 1 pins: p1, p2, vcmpout, txvan0 group 2 pins: p3, p4, p5 2. group 3 pins: pal, pah group 4 pins: pcs, pct, pcm, p6, txvan1 table 3-1: absolute maximum ratings (t a = 25 c, v ss3x = 0 v) parameter symbol test conditions ratings unit supply voltage v dd5x -0.5 ~ +6.0 v av dd -0.5 ~ +6.0 v av ss -0.5 ~ +0.5 v a ss5x -0.5 ~ +0.5 v input voltage (all except v pp , x1, x2) v i1 v i1 < v dd5x + 0.5 v -0.5 ~ +6.0 v v pp v i3 v dd5x = 4.5 v - 5.5 v -0.5 ~ 8.5 v output current low 1 pin i ol0 4.0 ma all pins i ol1 50 ma group 1, 2 note 1 i ol2 18 ma group 3, 4 note 2 i ol3 36 ma output current high 1 pin i oh0 -4.0 ma all pins i oh1 -50 ma group 1, 2 note 1 i oh2 -18 ma group 3, 4 note 2 i oh3 -36 ma output voltage v o v o < v dd5x + 0.5 v -0.5 ~ +6.0 v operating temperature t opr -40 ~ +85 c operating temperature t prg during programming 0 ~ +70 c storage temperature t stgb before program -55 ~ +150 c t stga after program -55 ~ +125 c
16 data sheet u14832ee2v1ds00 pd76f0018 3.2 operating conditions notes: 1. f cpu = cpu operating frequency, as output (if enabled) on the clockout pin. 2. see ? external clock in direct mode ? on page 18 for clock mode definition. the inside clock frequency is half of the applied external frequency. 3. see ? crystal or ceramic resonator connection in osc mode (t a = -40 ~ +85 c) ? on page 18 for clock mode definition. the inside clock frequency is the quartz frequency, multiplied by 4. 4. see ? crystal or ceramic resonator connection in osc mode (t a = -40 ~ +85 c) ? on page 18 for clock mode definition. the inside clock frequency is the quartz frequency. the pll must be set permanently off by clearing the pllen flag. table 3-2: operating conditions clock mode operation mode operating temperature (t a ) supply voltage (v dd5x ) inside operation clock frequency note 1 direct mode note 2 all modes -40 ~ +85 c 4.5 v ~ 5.5 v 4 mhz
17 data sheet u14832ee2v1ds00 pd76f0018 3.3 general characteristics 3.3.1 oscillator characteristics 3.3.2 pll characteristics 3.3.3 i/o capacitances table 3-3: oscillator characteristics (t a = -40 ~ +85 c) parameter symbol test conditions min. typ. max. unit oscillation stabilization time t ost osc mode 10 ms table 3-4: pll characteristics (t a = -40 ~ +85 c) parameter symbol test conditions min. typ. max. unit pll lock time t pll osc mode 1 ms table 3-5: i/o capacitances (t a = 25 c, v dd5x = v ss5x = 0 v) parameter symbol test conditions min. typ. max. unit input capacitance c i f c = 1 mhz unmeasured pins returned to 0 v 15 pf input/output capaci- tance c io 15 pf output capacitance c o 15 pf
18 data sheet u14832ee2v1ds00 pd76f0018 3.4 oscillator recommendations (a) crystal or ceramic resonator connection in osc mode (t a = -40 ~ +85 c) figure 3-1: crystal or resonator connection in osc mode remark: values of capacitors depend on used resonator, must be specified in cooperation with resonator manufacturer (b) external clock in direct mode figure 3-2: external clock in direct mode remarks: 1. clksel termination resistor value: 1 k to 10 k to v dd5 2. x1 termination resistor value: 1 k to 10 k to v ss5x clksel clockin c2 c1 q u v ss5x cv ss cv ss x1 x2 clksel clockin external clock open cv ss v dd5x x1 x2
19 data sheet u14832ee2v1ds00 pd76f0018 3.5 dc characteristics table 3-6: dc characteristics (t a = -40 ~ +85 c, v dd5x = 4.5 v ~ 5.5 v , v ss5x = 0 v) notes: 1. rxvan-pins: rx0van0, rx1van0, rx2van0, rx0van1, rx1van1, rx2van1 2. under this test condition, current is limited to 1.5ma for the following pins: p1, p2, vcmpout parameter symbol test conditions min. typ. max. unit input voltage high all except: p20,p22,x1 ,x2,pah, rxvan- pins note1 v ih1 0.8 v dd5x v dd5x v input voltage low v il1 0 0.2 v dd5x v input voltage high pa h , rxvan- pins note1 v ih2 0.7 v dd5x v dd5x v input voltage low v il2 0 0.3 v dd5x v input voltage high p20,22 v iht 2.2 v dd5x v input voltage low p20,22 v ilt 00.8v output voltage high v oh0 i oh0 = -3.0 ma v dd5x -1.0 v v output voltage low all except: txvan0 - 1 v ol0 i ol0 = 3.0 ma 0.4 v txvan0 - 1 v ol4 i ol4 = 3.2 ma note 2 0.4 v input leakage current, high i lih v i = v dd5 5a input leakage current, low i lil v i = 0 -5 a
20 data sheet u14832ee2v1ds00 pd76f0018 table 3-7: power supply currents (t a = -40 ~ +85 c, v dd5x = 4.5 v ~ 5.5 v , v ss5x = 0 v) parameter symbol test conditions min. typ. max. unit supply current i dd1d operating (f cpu = 20 mhz) direct mode 65 130 ma i dd1p operating (f cpu = 20 mhz) osc mode x 4 65 130 ma i dd1d1 operating (f cpu = 16 mhz) direct mode 53 110 ma i dd1p1 operating (f cpu = 16 mhz) osc mode x 4 53 110 ma i dd1p2 operating (f cpu = 4 mhz) osc mode x 1 14 30 ma i dd2d halt (f cpu = 20 mhz) direct mode 50 100 ma i dd2p halt (f cpu = 20 mhz) osc mode x 4 50 100 ma i dd2d1 halt (f cpu =16 mhz) direct mode 42 85 ma i dd2p1 halt (f cpu = 16 mhz) osc mode x 4 42 85 ma i dd2p2 halt (f cpu = 4 mhz) osc mode x 1 11 22 ma i dd3d idle (f cpu = 20 mhz) direct mode 6.5 15 ma i dd3p idle (f cpu = 20 mhz) osc mode x 4 6.5 15 ma i dd3d1 idle (f cpu = 16 mhz) direct mode 614ma i dd3p1 idle (f cpu = 16 mhz) osc mode x 4 614ma i dd3p2 idle (f cpu = 4 mhz) osc mode x 1 38ma i dd4d watch (f cpu = 5 mhz) direct mode 0.8 3.2 ma i dd4p watch (f cpu = 5 mhz) osc mode x 1 0.8 3.2 ma i dd4p1 watch (f cpu = 4 mhz) osc mode x 1 0.6 3.0 ma
21 data sheet u14832ee2v1ds00 pd76f0018 3.6 ac characteristics 3.6.1 general (t a = -40 ~ +85 c, v dd5x = 4.5 v ~ 5.5 v, v ss5x = 0 v, output pin load capacitance: c l = 50 pf) figure 3-3: ac test input/output waveform, ac test load condition 3.6.2 clock figure 3-4: clock ac characteristics table 3-8: clock ac characteristics parameter symbol test conditions min. max. unit clockin input cycle t cyci direct mode 25 125 ns clockin input high-level width t wcih direct mode 12 ns clockin input low-level width t wcil direct mode 12 ns test points 0.8 v dd5 0.2 v dd5 v dd5 0 v dut load on test c l =50pf t wcih t cyci t wcil clockin (direct mode)
22 data sheet u14832ee2v1ds00 pd76f0018 3.6.3 external memory access read timing remarks: 1. t: 1/f cpu (= frequency of clkout) 2. i : number of idle states specified by bcc register 3. w as : number of waits specified by asc register 4. w d : number of waits specified by dwc1, dwc2 register; w d table 3-9: external memory access read timing parameter symbol min. max. unit data input set up time (vs.address) <10> t said (2+w+w d +w as )t - 70 ns data input set up time (vs. rd
23 data sheet u14832ee2v1ds00 pd76f0018 figure 3-5: external memory access read timing t1 tw t2 <16> <13> <12> <15> <17> <10> <11> <14> <31> ti tasw <32> clkout (output) csn a0-a25 d0-d15 rd wait (output) (output) (in/output) (input) wr0, wr1 (output)
24 data sheet u14832ee2v1ds00 pd76f0018 3.6.4 external memory access write timing remarks: 1. t: 1/f cpu (= frequency of clkout) 2. i : number of idle states specified by bcc register 3. w as : number of waits specified by asc register 4. w d : number of waits specified by dwc1, dwc2 register; w d table 3-10: external memory access write timing parameter symbol min. max. unit address, csn
25 data sheet u14832ee2v1ds00 pd76f0018 figure 3-6: external memory access write timing <23> <21> <22> <20> <24> <25> <26> t1 tw t2 ti tasw <31> <32> clkout (output) csn a0-a25 d0-d15 rd wait (output) (output) (in/output) (input) wr0, wr1 (output) write
26 data sheet u14832ee2v1ds00 pd76f0018 3.6.5 reset table 3-11: reset timing note: t ost : oscillation stabilization time figure 3-7: reset timing remark: n = 0 to 2 parameter symbol test conditions min. max. unit reset high-level width t wrsh 500 ns reset low-level width t wrsl0 stop mode release, osc mode t ost note ms t wrsl1 stop mode release, direct mode 1.5 ms t wrsl2 except stop mode release 1.5 ms reset hold time (from v dd5x ) t hvrsl0 osc mode on power-on t ost ms t hvrsl1 direct mode on power-on 1.5 ms t wrsh t wrsln reset dd5x reset t hvrsl v dd5x v
27 data sheet u14832ee2v1ds00 pd76f0018 3.6.6 interrupt timing table 3-12: interrupt timing notes: 1. m = 0 ~ 5, n = 0 ~ 2 2. design constraint is 100 ns 3. t sam = 1/f sam (f sam is set by register setting in filter. f sam = f cpu or f cpu /2 or f cpu /16) figure 3-8: interrupt timing parameter note 1 symbol test conditions min. max. unit nmi high-level width t wnih 500 note 2 ns nmi low-level width t wnil 500 note 2 ns intpemn, intn note 1 high-level width t witha analog filter 500 note 2 ns lintpemn, intn note 1 low-level width t witla analog filter 500 note 2 ns intpemn, intn note 1 high-level width t withd digital filter 5t sam +10 note 3 ns intpemn, intn note 1 low-level width t witld digital filter 5t sam +10 note 3 ns t wnih t wnil t witha/d t witla/d nmi intpemn, intn
28 data sheet u14832ee2v1ds00 pd76f0018 3.7 peripheral function characteristics 3.7.1 timer e notes: 1. m = 0 - 5, n = 0 - 2 2. t = 1/f cpu 3. t sam = 1/f sam (f sam is set by register setting in filter. f sam = f cpu or f cpu /2 or f cpu /16) figure 3-9: timer e characteristics table 3-13: timer e characteristics parameter note 1 symbol test conditions min. max. unit tiemn high-level width note 1 t wtiha no filter t note 2 + 10 ns tiemn low-level width note 1 t wtila no filter t note 2 + 10 ns tclren high-level width t wtcha no filter t note 2 + 10 ns tclren low-level width t wtcla no filter t note 2 + 10 ns tiemn high-level width note 1 t wtihd digital filter 5t sam note 3 + 10 ns tiemn low-level width note 1 t wtild digital filter 5t sam note 3 + 10 ns tclren high-level width t wtchd digital filter 5t sam note 3 + 10 ns tclren low-level width t wtcld digital filter 5t sam note 3 + 10 ns t wtiha/d tiemn t wtila/d t wtcha/d tclren t wtcla/d
29 data sheet u14832ee2v1ds00 pd76f0018 3.7.2 csi i figure 3-10: csi slave mode characteristics table 3-14: csi master mode characteristics parameter symbol test condi- tions min. max. unit sck cycle time t cysk output 200 ns sck high level width t wskh output 0.5 t cysk -15 ns sck low level width t wskl output 0.5 t cysk -15 ns si set up time (to sck table 3-15: csi slave mode characteristics parameter symbol test condi- tions min. max. unit sck cycle time t cysk input 200 ns sck high level width t wskh input 90 ns sck low level width t wskl input 90 ns si set up time (to sck
30 data sheet u14832ee2v1ds00 pd76f0018 3.7.3 uart 3.7.4 fvan 3.7.5 fcan table 3-16: uart characteristics parameter symbol test conditions min. max. unit transfer rate t uart f cpu table 3-17: fvan characteristics parameter symbol test conditions min. max. unit transfer rate t fvan f cpu table 3-18: fcan characteristics parameter symbol test conditions min. max. unit transfer rate t fcan f cpu
31 data sheet u14832ee2v1ds00 pd76f0018 3.7.6 a/d converter notes: 1. quantization error is not included 2. t conv depends on register adscm1 3. t sam depends on register adscm1 4. if adc is set to standby mode, av ref can be disconnected externally (left open) to reduce current consumption 3.7.7 voltage comparator characteristics table 3-19: a/d converter characteristics (t a = -40 ~ +85 c, v dd5x = 4.5 ~ 5.5 v, av dd = v dd5x ) parameter symbol test cond. min. typ. max. unit resolution - 10 bit overall error note 1 - av ref = av dd table 3-20: voltage comparator characteristics (t a = -40 ~ +85 c, v dd5x = 4.5 v ~ 5.5 v) parameter symbol test conditions min. typ. max. unit comparator analog input voltage v cin 0 v dd5x v threshold voltage v th v dd5x = 4.5 ~ 5.5 v 1.1 1.25 1.4 v
32 data sheet u14832ee2v1ds00 pd76f0018 3.8 flash eprom characteristics notes: 1. exclusive recovery time, firmware execution and verify 2. measured condition after tpe (erase-time) = 100 ms table 3-21: flash eprom programming characteristics basic specification parameter symbol test conditions min. typ. max. unit operation frequency f x 420mhz supply voltage v dd5x 4.5 5.5 v v ppl low input -0.3 v dd5x v v pph programming mode 7.5 7.8 8.1 v maximum times of reprogram- ming c wrt 100 times write time t iwrtw word (32-bit) note 1 50 200 s write back time / block t wback note1 10 s erase time t erascb block (128 kbyte) note 1 230s t erascc chip (256 kbyte) note 1 20 60 s programming temperature t prg 0+70 c erase / write current i ppe/w v pph = typ. note 2 100 ma
33 data sheet u14832ee2v1ds00 pd76f0018 note: t = 1/f cpu figure 3-11: flash eprom programming timing table 3-22: flash eprom serial programming operation characteristics parameter symbol test condi- tions min. typ. max. unit v dd
34 data sheet u14832ee2v1ds00 pd76f0018 4. package drawing figure 4-1: package drawing 108 73 13 6 109 144 72 37 144-pin plastic lqfp (fine pitch) (20x20) item millimeters note a 22.0 + ? + ?
35 data sheet u14832ee2v1ds00 pd76f0018 5. recommended soldering conditions solder this product under the following recommended conditions. for details of the recommended soldering conditions, refer to information document semiconductor device: mounting technology manual (c10535e). for soldering methods and conditions other than those recommended, consult nec. notes: 1. after that, prebaking is necessary at 125 c for 10 hours. 2. the number of days refers to storage at 25 c, 65% rh max after the dry pack has been opened. caution: do not use two or more soldering methods in combination (except partial heating method). table 5-1: soldering conditions soldering method soldering condition symbol of recommended soldering condition infrared reflow package peak temperature: 230 c, time: 30 seconds max. (210 c min.), number of times: 2 max., number of days: 3 note 1 ir30-103-2 vps package peak temperature: 215 c, time: 30 seconds max. (210 c min.), number of times: 2 max., number of days: 3 note 1 vp15-103-2 partial heating pin temperature: 300 c max., time: 3 seconds max. (per side of device) -
36 data sheet u14832ee2v1ds00 pd76f0018 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
37 data sheet u14832ee2v1ds00 pd76f0018 6. revision history version date (xx.xx.2002) author remarks 0.1 25.05.2000 e. gebing 1st preparation ppi 1.0 23.05.2001 e. gebing preliminary data sheet 2.0 14.01.2002 e.gebing data sheet 2.1 23.01.2002 e.gebing data sheet
38 pd76f0018 data sheet u14832ee2v1ds00 regional information some information contained in this document may vary from country to country. before using any nec product in your application, piease contact the nec office in your country to obtain a list of authorized representatives and distributors. they will verify: ? ? ? ? ? ? ? lizy-villacoublay, france tel: 01-3067-58-00 fax: 01-3067-58-99 nec electronics (france) s.a. representaci n en espa ? a madrid, spain tel: 091-504-27-87 fax: 091-504-28-60 ?
39 pd76f0018 data sheet u14832ee2v1ds00 ms-dos and ms-windows are either registered trademarks or trademarks of microsoft corporation in the united states and/or other countries. pc/at and pc dos are trademarks of ibm corp. the related documents in this publication may include preliminary versions. however, preliminary versions are not marked as such. the export of this product from japan is regulated by the japanese government. to export this product may be prohibited without governmental license, the need for which must be judged by th customer. the export or re-export of this product from a country other than japan may also be prohibited without a license from that country. please call an nec sales representative. m5 2000.03 the information in this document is current as of 23.01.2002. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec ? s data sheets or data books, etc., for the most up-to-date specifications of nec semiconductor products. not all products and/or types are available in every country. please check with an nec sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without prior written consent of nec. nec assumes no responsibility for any errors that may appear in this document. nec does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec semiconductor products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of customer ? s equipment shall be done under the full responsibility of customer. nec assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec endeavours to enhance the quality, reliability and safety of nec semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti- failure features. nec semiconductor products are classified into the following three quality grades: ? standard ? , ? special ? and ? specific ? . the ? specific ? quality grade applies only to semiconductor products developed based on a customer-designated ? quality assurance program ? for a specific application. the recommended applications of a semiconductor product depend on its quality grade, as indicated below. customers must check the quality grade of each semiconductor product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equip- ment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti- disaster systems, anti-crime systems, safety equipment and medical equipment (not specifi- cally designed for life support). "specific": aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec semiconductor products is ? standard ? unless otherwise expressly specified in nec's data sheets or data books, etc. if customers wish to use nec semiconductor products in applications not intended by nec, they must contact an nec sales representative in advance to determine nec's willingness to support a given application. notes: (1) ? nec ? as used in this statement means nec corporation and also includes its majority-owned subsidiaries. (2) ? nec semiconductor products ? means any semiconductor product developed or manufactured by or for nec (as defined above).
40 pd76f0018 data sheet u14832ee2v1ds00
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